1. Field of the Invention
The present invention relates generally to a thin film transistor array substrate, a liquid crystal display (LCD) device having the substrate and fabricating methods thereof, and more particularly to a thin film transistor array substrate, a liquid crystal display (LCD) device having the substrate and fabricating methods thereof, which are capable of improving an aperture ratio of a pixel region.
2. Background of the Related Art
In general, an LCD device controls light transmittance of a liquid crystal with a dielectric anisotropy using an electric field, thereby displaying an image. The LCD device is usually fabricated such that a color filter array substrate and a thin film transistor array substrate are combined together with a liquid crystal layer being disposed between the two substrates.
In the related art, an LCD device with a narrow viewing angle is regarded as a TN (Twisted Nematic) mode LCD device. LCD devices with wide viewing angle characteristics are usually classified into an in-plane switching (IPS) mode, an optically compensated birefringence (OCB) mode, a fringe field switching (FFS) mode, etc.
Among the LCD devices with the wide viewing angles, the IPS mode LCD device allows a pixel electrode and a common electrode to be arranged on the same substrate so that a horizontal electric field is induced between the electrodes. As such, major axes of liquid crystal molecules are aligned in a horizontal direction with respect to the substrate. Accordingly, the IPS mode LCD device has a wider viewing angle than that of the TN mode LCD device.
FIG. 1 is a view schematically showing a pixel structure in an IPS mode LCD device according to the related art. FIG. 2 is a cross-sectional view schematically showing the pixel structure taken along a line I-I′ of FIG. 1.
As shown in FIG. 1, a gate line 1 and a data line 5 cross each other, thereby defining a pixel region. A thin film transistor TFT is disposed as a switching element at an intersection of the gate and data lines 1 and 5. On the pixel region, a first common line 3 is opposite to the gate line 1 and crosses the data line 5. First common electrodes 3a, which are branched from the first common line 3 and parallel to the data line 5, are formed on both sides of the pixel region. The gate line 1 may be configured to include a gate electrode 1a with a width. A first storage electrode 6 is disposed adjacent to the gate electrode la, and is formed in a single body with the first common electrodes 3a. 
Also, a second common line 13 for electrically contacting the first common line 3 is formed over the first common line 3. A second common electrode 13a is branched from the second common line 13 and formed on the pixel region. In addition, third common electrodes 13b are branched from the second common line 13 and partially overlap the first common electrodes 3a. The second common electrode 13a is alternately disposed with pixel electrodes 7a in the pixel region. A second storage electrode 7 overlaps with the first storage electrode 6. The pixel electrodes 7a are branched from the second storage electrode 7.
As shown in FIG. 2, which is the cross-sectional view taken along the line I-I′ in a region of the data line 5, a gate insulation film 12 is formed on a lower substrate 10. The data line 5 is formed on the gate insulation film 10. The first common electrodes 3a arranged at both sides of the data line 5 are formed on the lower substrate 10. The third common electrodes 13b are formed on a protective (or passivation) film 19 and partially overlap the first common electrodes 3a. 
The color filter array substrate may be configured to include an upper substrate 20 and a black matrix 21 that is opposite to the data line 5. The black matrix 21 is formed on the upper substrate 20. A red (R) color filter layer 25a and a green (G) color filter layer 25b are formed by both side of the black matrix 21. A reference numeral “29” denotes an overcoat layer.
Such an IPS mode LCD device of the related art forces a width L1 of the black matrix 21 to become larger, in order to prevent light leakage caused by light that is generated in a backlight unit and passes around the edges of the pixel region. More specifically, the black matrix 21 is formed to reach to an edge of the first common electrode 3a so as to intercept light passing between the data line 5 and the first common electrode 3a in a direction inclined by at least a constant angle with respect to a vertical line. Such a structure arrangement decreases an aperture ratio of the pixel region. In addition, since the pixel electrodes and the common electrodes arranged in the pixel region are formed in a single metal layer, it is difficult to improve the aperture ratio of the pixel region by reducing the width of the electrodes.